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| (R) L6385 HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER HIGH VOLTAGE RAIL UP TO 600 V dV/dt IMMUNITY +- 50 V/nsec IN FULL TEMPERATURE RANGE DRIVER CURRENT CAPABILITY: 400 mA SOURCE, 650 mA SINK SWITCHING TIMES 50/30 nsec RISE/FALL WITH 1nF LOAD CMOS/TTL SCHMITT TRIGGER INPUTS WITH HYSTERESIS AND PULL DOWN UNDER VOLTAGE LOCK OUT ON LOWER AND UPPER DRIVING SECTION INTERNAL BOOTSTRAP DIODE OUTPUTS IN PHASE WITH INPUTS DESCRIPTION The L6385 is an high-voltage device, manufactured with the BCD"OFF-LINE" technology. It has a Driver structure that enables to drive indeBLOCK DIAGRAM SO8 Minidip ORDERING NUMBERS: L6385D L6385 pendent referenced N Channel Power MOS or IGBT. The Upper (Floating) Section is enabled to work with voltage Rail up to 600V. The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices. BOOTSTRAP DRIVER 8 Vboot H.V. Cboot VCC 3 UV DETECTION UV DETECTION R R HVG DRIVER 7 HVG HIN 2 LOGIC LEVEL SHIFTER S VCC OUT 6 5 LVG DRIVER LVG TO LOAD LIN 1 4 GND D97IN514B November 2003 1/9 L6385 ABSOLUTE MAXIMUM RATINGS Symbol Vout Vcc Vboot Vhvg Vlvg Vi dVout/dt Ptot Tj Ts Output Voltage Supply Voltage Floating Supply Voltage Upper Gate Output Voltage Lower Gate Output Voltage Logic Input Voltage Allowed Output Slew Rate Total Power Dissipation (Tj = 85 C) Junction Temperature Storage Temperature Parameter Value -3 to Vboot - 18 - 0.3 to +18 - 1 to 618 - 1 to Vboot -0.3 to Vcc +0.3 -0.3 to Vcc +0.3 50 750 150 -50 to 150 Unit V V V V V V V/ns mW C C Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900V (Human Body Model) PIN CONNECTION LIN HIN Vcc GND 1 2 3 4 D97IN517 8 7 6 5 Vboot HVG OUT LVG THERMAL DATA Symbol Rth j-amb Parameter Thermal Resistance Junction to Ambient SO8 150 Minidip 100 Unit C/W PIN DESCRIPTION N. 1 2 3 4 5 6 7 8 Name LIN HIN Vcc GND LVG (*) VOUT HVG (*) Vboot Type I I I O O O Lower Driver Logic Input Upper Driver Logic Input Low Voltage Power Supply Ground Low Side Driver Output Upper Driver Floating Reference High Side Driver Output Bootstrap Supply Voltage Function (*) The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA). This allows to omit the "bleeder" resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low. 2/9 L6385 RECOMMENDED OPERATING CONDITIONS Symbol Vout VbootVout fsw Vcc Tj Pin 6 8 Parameter Output Voltage Floating Supply Voltage Switching Frequency Supply Voltage Junction Temperature HVG,LVG load CL = 1nF -45 Test Condition Min. Note 1 Note 1 Typ. Max. 580 17 400 17 125 Unit V V kHz V C 2 Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V. ELECTRICAL CHARACTERISTICS AC Operation (Vcc = 15V; Tj = 25C) Symbol ton toff tr tf Pin 1 vs 5 2 vs 7 7,5 7,5 Parameter High/Low Side Driver Turn-On Propagation Delay High/Low Side Driver Turn-Off Propagation Delay Rise Time Fall Time Test Condition Vout = 0V Vout = 600V CL = 1000pF CL = 1000pF Min. Typ. 110 105 50 30 Max. Unit ns ns ns ns DC OPERATION (Vcc = 15V; Tj = 25C) Symbol Vcc Vccth1 Vccth2 Vcchys Iqccu Iqcc Rdson VBS VBSth1 VBSth2 VBShys IQBS 8 Pin 3 Parameter Supply Voltage Vcc UV Turn On Threshold Vcc UV Turn Off Threshold Vcc UV Hysteresis Undervoltage Quiescent Supply Current Quiescent Current Bootstrap Driver on Resistance (*) Bootstrap Supply Voltage VBS UV Turn On Threshold VBS UV Turn Off Threshold VBS UV Hysteresis VBS Quiescent Current 8.5 7.2 HVG ON VS = VB = 600V VIN = Vih (tp < 10s) VIN = Vil (tp < 10s) 300 450 400 650 1.5 3.6 VIN = 15V VIN = 0V 50 70 1 9.5 8.2 1.3 Vcc 9V Vcc = 15V Vcc 12.5V Test Condition Min. Typ. Max. 17 10.1 8.8 220 320 Unit V V V V A A V V V V A A mA mA V V A A Low Supply Voltage Section 9.1 7.9 9.6 8.3 1.3 150 250 125 Bootstrapped supply Voltage Section 17 10.5 9.2 200 10 ILK High Voltage Leakage Current High/Low Side Driver Iso 5,7 Isi Logic Inputs Vil Vih Iih Iil 2,3 Source Short Circuit Current Sink Short Circuit Current Low Level Logic Threshold Voltage High Level Logic Threshold Voltage High Level Logic Input Current Low Level Logic Input Current (*) RDSON is tested in the following way: RDSON = (VCC - VCBOOT1) - (VCC - VCBOOT2) I1(VCC,VCBOOT1) - I2(VCC,VCBOOT2) where I1 is pin 8 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2. 3/9 L6385 Figure 1. Input/Output Timing Diagram HIN HVG LIN LVG D99IN1053 Figure 2. Typical Rise and Fall Times vs. Load Capacitance time (nsec) 250 200 Tr 150 Tf 100 50 0 D99IN1054 Figure 3. Quiescent Current vs. Supply Voltage Iq (A) 104 D99IN1055 103 102 10 0 1 2 3 4 5 C (nF) For both high and low side buffers @25C Tamb 0 2 4 6 8 10 12 14 16 VS(V) BOOTSTRAP DRIVER A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished by a high voltage fast recovery diode (fig. 4a). In the L6385 a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low side driver (LVG), with in series a diode, as shown in fig. 4b An internal charge pump (fig. 4b) provides the DMOS driving voltage . The diode connected in series to the DMOS has been added to avoid undesirable turn on of it. CBOOT selection and charging: To choose the proper CBOOT value the external MOS can be seen as an equivalent capacitor. 4/9 This capacitor CEXT is related to the MOS total gate charge : CEXT = Qgate Vgate The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss . It has to be: CBOOT>>>CEXT e.g.: if Qgate is 30nC and Vgate is 10V, CEXT is 3nF. With CBOOT = 100nF the drop would be 300mV. If HVG has to be supplied for a long time, the CBOOT selection has to take into account also the L6385 leakage losses. e.g.: HVG steady state consumption is lower than 200A, so if HVG TON is 5ms, CBOOT has to supply 1C to CEXT. This charge on a 1F capacitor means a voltage drop of 1V. The internal bootstrap driver gives great advantages: the external fast recovery diode can be avoided (it usually has great leakage current). This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. The bootstrap driver introduces a voltage drop due to the DMOS RDSON (typical value: 125 Ohm). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken in to account. The following equation is useful to compute the Figure 4. Bootstrap Driver. DBOOT drop on the bootstrap DMOS: Vdrop = IchargeRdson Vdrop = Qgate Rdson Tcharge where Qgate is the gate charge of the external power MOS, Rdson is the on resistance of the bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor. For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap DMOS is about 1V, if the Tcharge is 5s. In fact: Vdrop = 30nC 125 ~ 0.8V 5s Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop is too high, or the circuit topology doesn't allow a sufficient charging time, an external diode can be used. VS VBOOT H.V. HVG VS VBOOT H.V. HVG CBOOT VOUT TO LOAD CBOOT VOUT TO LOAD LVG LVG a b D99IN1056 Figure 5. Turn On Time vs. Temperature 250 Figure 6. Turn Off Time vs. Temperature 250 @ Vcc = 15V 200 Ton (ns) @ Vcc = 15V 200 Toff (ns) 150 Typ. 150 Typ. 100 50 0 -45 -25 0 25 50 Tj (C) 75 100 125 100 50 0 -45 -25 0 25 50 Tj (C) 75 100 125 5/9 L6385 Figure 7. VBOOT UV Turn On Threshold vs. Temperature 13 12 11 Vccth2(V) Vbth1 (V) 10 9 8 7 6 5 -45 -25 0 25 50 Tj (C) 75 100 125 6 -45 -25 0 25 50 75 100 125 Tj (C) Typ. Figure 10. Vcc UV Turn Off Threshold vs. Temperature 11 @ Vcc = 15V 10 9 Typ. 8 7 Figure 8. VBOOT UV Turn Off Threshold vs. Temperature 14 13 12 Vbth2 (V) 11 10 9 8 7 6 -45 -25 0 25 50 75 100 125 Typ. Figure 11. Output Source Current vs. Temperature 1000 @ Vcc = 15V current (mA) @ Vcc = 15V 800 600 Typ. 400 200 0 -45 -25 0 25 50 Tj (C) 75 100 125 Figure 9. Vcc UV Turn On Threshold vs. Temperature 13 12 Figure 12. Output Sink Current vs. Temperature 1000 @ Vcc = 15V 800 current (mA) 600 400 200 0 Vccth1(V) 11 10 9 8 7 -45 -25 0 25 50 Tj (C) 75 100 125 Typ. Typ. -45 -25 0 25 50 Tj (C) 75 100 125 6/9 L6385 mm DIM. MIN. A a1 B b b1 D E e e3 e4 F I L Z 3.18 7.95 2.54 7.62 7.62 6.6 5.08 3.81 1.52 0.125 0.51 1.15 0.356 0.204 1.65 0.55 0.304 10.92 9.75 0.313 TYP. 3.32 0.020 0.045 0.014 0.008 MAX. MIN. inch TYP. 0.131 MAX. OUTLINE AND MECHANICAL DATA 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0.260 0.200 0.150 0.060 Minidip 7/9 L6385 mm DIM. MIN. A A1 A2 B C D (1) E e H h L k ddd Note: inch MAX. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 MIN. 0.053 0.004 0.043 0.013 0.007 0.189 0.15 0.050 6.20 0.50 1.27 0.228 0.010 0.016 0.244 0.020 0.050 TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.197 0.157 TYP. OUTLINE AND MECHANICAL DATA 1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 5.80 0.25 0.40 0 (min.), 8 (max.) 0.10 0.004 (1) Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm (.006inch) in total (both side). SO-8 0016023 C 8/9 L6385 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2003 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 9/9 |
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